gpio.h

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/*
 * This file is part of RTLib.
 *
 * Copyright (C) 2018 Derppening <david.18.19.21@gmail.com>
 *
 * RTLib is free software: you can redistribute it and/or modify
 * it under the terms of the GNU Lesser General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * RTLib is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public License
 * along with RTLib.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef RTLIB_CORE_STM32F1_GPIO_H_
#define RTLIB_CORE_STM32F1_GPIO_H_

#if defined(STM32F1)

#include <cstdint>
#include <utility>

#include <libopencm3/stm32/gpio.h>

#include "core/util.h"

namespace core {
namespace stm32f1 {

class GPIO final {
 public:
  using AltFnMaps = uint32_t;

  enum struct Configuration : uint8_t {
    kInputAnalog = 0x0,
    kInputFloat,
    kInputPullUpDown,
    kOutputPushPull = 0x0,
    kOutputOpenDrain,
    kOutputAltFnPushPull,
    kOutputAltFnOpenDrain
  };

  enum struct Mode : uint8_t {
    kInput,
    kOutput10MHz,
    kOutput2MHz,
    kOutput50MHz
  };

  enum struct JTAGDisables : uint32_t {
    kNoDisable = AFIO_MAPR_SWJ_CFG_FULL_SWJ,
    kNoJNTRST = AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_JNTRST,
    kDisableJTAG = AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON,
    kDisableJTAGSW = AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_OFF
  };

  enum struct PriRemap : uint32_t {
    kADC2ExtTrigReg = AFIO_MAPR_ADC2_ETRGREG_REMAP,
    kADC2ExtTrigInj = AFIO_MAPR_ADC2_ETRGINJ_REMAP,
    kADC1ExtTrigReg = AFIO_MAPR_ADC1_ETRGREG_REMAP,
    kADC1ExtTrigInj = AFIO_MAPR_ADC1_ETRGINJ_REMAP,
    kTIM5Ch4 = AFIO_MAPR_TIM5CH4_IREMAP,
    kPD01 = AFIO_MAPR_PD01_REMAP,
    kTIM4 = AFIO_MAPR_TIM4_REMAP,
    kUSART2 = AFIO_MAPR_USART2_REMAP,
    kUSART1 = AFIO_MAPR_USART1_REMAP,
    kI2C1 = AFIO_MAPR_I2C1_REMAP,
    kSPI1 = AFIO_MAPR_SPI1_REMAP,
    kCAN1PA = AFIO_MAPR_CAN1_REMAP_PORTA,
    kCAN1PB = AFIO_MAPR_CAN1_REMAP_PORTB,
    kCAN1PD = AFIO_MAPR_CAN1_REMAP_PORTD,
    kTIM3NoRemap = AFIO_MAPR_TIM3_REMAP_NO_REMAP,
    kTIM3PartRemap = AFIO_MAPR_TIM3_REMAP_PARTIAL_REMAP,
    kTIM3FullRemap = AFIO_MAPR_TIM3_REMAP_FULL_REMAP,
    kTIM2NoRemap = AFIO_MAPR_TIM2_REMAP_NO_REMAP,
    kTIM2PartRemap1 = AFIO_MAPR_TIM2_REMAP_PARTIAL_REMAP1,
    kTIM2PartRemap2 = AFIO_MAPR_TIM2_REMAP_PARTIAL_REMAP2,
    kTIM2FullRemap = AFIO_MAPR_TIM2_REMAP_FULL_REMAP,
    kTIM1NoRemap = AFIO_MAPR_TIM1_REMAP_NO_REMAP,
    kTIM1PartRemap = AFIO_MAPR_TIM1_REMAP_PARTIAL_REMAP,
    kTIM1FullRemap = AFIO_MAPR_TIM1_REMAP_FULL_REMAP,
    kUSART3NoRemap = AFIO_MAPR_USART3_REMAP_NO_REMAP,
    kUSART3PartRemap = AFIO_MAPR_USART3_REMAP_PARTIAL_REMAP,
    kUSART3FullRemap = AFIO_MAPR_USART3_REMAP_FULL_REMAP,
    kPTPPPS = AFIO_MAPR_PTP_PPS_REMAP,
    kTIM2IntTrig1 = AFIO_MAPR_TIM2ITR1_IREMAP,
    kSPI3 = AFIO_MAPR_SPI3_REMAP,
    kMIIOrRMIISelect = AFIO_MAPR_MII_RMII_SEL,
    kCAN2 = AFIO_MAPR_CAN2_REMAP,
    kEthMAC = AFIO_MAPR_ETH_REMAP
  };

  enum struct SecRemap : uint32_t {
    kMisc = AFIO_MAPR2_MISC_REMAP,
    kTIM12 = AFIO_MAPR2_TIM12_REMAP,
    kTIM76DMA = AFIO_MAPR2_TIM76_DAC_DMA_REMAPE,
    kDisconnectNADV = AFIO_MAPR2_FSMC_NADV_DISCONNECT,
    kTIM14 = AFIO_MAPR2_TIM14_REMAP,
    kTIM13 = AFIO_MAPR2_TIM13_REMAP,
    kTIM11 = AFIO_MAPR2_TIM11_REMAP,
    kTIM10 = AFIO_MAPR2_TIM10_REMAP,
    kTIM9 = AFIO_MAPR2_TIM9_REMAP,
    kTIM1DMA = AFIO_MAPR2_TIM1_DMA_REMAP,
    kCEC = AFIO_MAPR2_CEC_REMAP,
    kTIM17 = AFIO_MAPR2_TIM17_REMAP,
    kTIM16 = AFIO_MAPR2_TIM16_REMAP,
    kTIM15 = AFIO_MAPR1_TIM16_REMAP
  };

  struct Config {
    Pinout pin = {};

    Configuration cnf = Configuration::kInputFloat;

    Mode mode = Mode::kInput;
  };

  explicit GPIO(const Config& config);

  GPIO(Pinout pin, Configuration cnf, Mode mode);

  ~GPIO() = default;

  GPIO(GPIO&& other) noexcept = default;
  GPIO& operator=(GPIO&& other) noexcept = default;

  GPIO(const GPIO&) = delete;
  GPIO& operator=(const GPIO&) = delete;

  bool Read() const;
  void Set(bool state) const;
  void Toggle() const;

  void Reset() const;

  static void SetPriAltFn(JTAGDisables swj_state, AltFnMaps maps);

  static void SetSecAltFn(AltFnMaps maps);

  static void SetPriAltFn(JTAGDisables swj_state, PriRemap map) { SetPriAltFn(swj_state, static_cast<uint32_t>(map)); }

  static void SetSecAltFn(SecRemap map) { SetSecAltFn(static_cast<uint32_t>(map)); }

 private:
  void Init(Configuration cnf, Mode mode) const;

  void InitRcc(Port port) const;

  const Pinout& GetPinout() const { return pin_; }
  Pinout pin_;
};

}  // namespace stm32f1
}  // namespace core

#endif  // defined(STM32F1)

#endif  // RTLIB_CORE_STM32F1_GPIO_H_